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New signal-generating circuit that can halve a silicon area for an LTE transceiver

ICSL (Prof. Jaehyouk Choi)’s paper “A 0.56 – 2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2 – 4G Multi-Standard Cellular Transceivers” has been accepted for publication in IEEE Journal of Solid-State Circuits (Authors: Heein Yoon, Yongsun Lee, Younghyun Lim, and Jaehyouk Choi)

In this paper, a wideband and low phase noise signal generator for cellular transceivers of smart phones was presented. Using the proposed idea, the required frequency tuning range of a VCO was reduced to 39%, and the silicon area of signal-generating circuits for an LTE transceiver can be minimized less than half. The prototype circuit was fabricated in a 40-nm CMOS process, and covered frequencies of 0.56 – 2.92 GHz. It occupied a silicon area of 0.15 mm2 and achieved an excellent phase noise performance.

 

Article title: A 0.56 – 2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2 – 4G Multi-Standard Cellular Transceivers

Authors: Heein Yoon, Yongsun Lee, Younghyun Lim, and Jaehyouk Choi

Journal title: IEEE Journal of Solid-State Circuits (JSSC)

IF: 3.009 (9.2%) / AIS: 1.603 (6.4%), JCR 2014