Faculty

AI Memory/Logic Components + Monolithic 3D Integration System

By developing components tailored to the characteristics of materials such as carbon nanotubes, stable two-dimensional materials, and high-current density oxide semiconductors, we are exploring the potential for enhancing system performance through the integration of diverse substances. The innovative cross-stacking technique of these new logic and memory components can remarkably overcome the connectivity limitations between computation units and memory in traditional silicon chips.

3D Printing Packaging + RF Meta Surface Printing

Semiconductor packaging technology focuses on reducing chip-to-chip distances and managing heat generation. We leverages high-resolution 3D printing to develop cost-effective customized packaging techniques. Additionally, we are advancing the development of large-area meta surface technology using printing methods. By employing printing techniques to create array patterns on plastic substrates, we can enhance communication distances and capabilities.

[Curriculum Vitae]

● 2022-Present: Assistant Professor, Department of Electrical Engineering, UNIST
● 2020-2022: Postdoc, Standford University, USA
● 2018-2020: Postdoc, POSTECH

[Education]

● 2018: Ph.D., POSTECH
● 2014: M.S., POSTECH
● 2012: B.S., POSTECH

[Research  Keywords and Topics]

 

[Publications (selected)]

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[Awards/ Honors/ Memberships]

● >30 SCI journal papers
● >1300 citations
● IEEE EDTC 2023 TPC
● IEEE TED/EDL reviewer